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Type :article
Subject :Q Science (General)
ISSN :0218-1266
Main Author :Zaidan, B. B.
Additional Authors :Zaidan, A. A.
Title :Software and hardware FPGA-based digital watermarking and steganography approaches: toward new methodology for evaluation and benchmarking using multi-criteria decision-making techniques
Place of Production :World Scientific
Year of Publication :2017

Abstract :
Evaluating and benchmarking software and hardware ¯eld programmable gate array (FPGA)-based digital watermarking are considered challenging tasks because of multiple and con°icting evaluation criteria. A few evaluation and benchmarking techniques/frameworks have been implemented to digital watermarking or steganography; however, these approaches still present certain limitations. In particular, ¯xing some attributes on account of other attributes and wellknown benchmarking approaches are limited to robust watermarking techniques. Thus, this study aims toward a new methodology for evaluation and benchmarking using multi-criteria analysis for software and hardware \FPGA"-based digital watermarking or steganography. To achieve this objective, two iterations are conducted. The ¯rst iteration consists of two stages: discussing software and hardware \FPGA"-based digital watermarking or steganography to create a dataset with various samples for benchmarking and discussing the evaluation method and then discussing the test for software and hardware \FPGA"-based digital watermarking or steganography according to multi-criteria evaluation (i.e., complexity, payload and quality) to create a decision matrix. The second iteration applies di®erent decision-making techniques (i.e.,SAW, MEW, HAW, TOPSIS, WSM and WPM)) to benchmark the results of the ¯rst iteration (i.e., software or hardware FPGA-based digital watermarking or steganography approaches).Then, the discussed mean, standard deviation and paired sample t-test results are used to measure the correlations among di®erent techniques based on the ranking results. The discussion ¯ndings are described as follows: (1) the integration of developer and evaluator preferences into the evaluation and benchmarking for software and hardware FPGA-based digital watermarking or steganography, (2) the process of assigning weights and (3) visualizing large-scale data sample in either software or hardware FPGA-based digital watermarking or steganography algorithms.

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